Graphene Bridge Heterostructure Devices for Negative Differential Transconductance Circuit Applications

Highlights Graphene (Gr)-bridge heterostructure, consisting of a laterally series-connected (cascade) ambipolar/Gr/n-type 2D van der Waals channel materials for ambipolar semiconductor-based high-end application devices was developed. Non-classical transfer characteristics (humped curve) in FET operation and negative differential transconductances were observed. Gr-bridge heterostructure device with PdSe2 (narrow bandgap) allows multi-value logic operation while WSe2 (wide bandgap) enables frequency tripler circuit operation. Supplementary Information The online version contains supplementary material available at 10.1007/s40820-022-01001-5.


Introduction
Two-dimensional van der Waals (2D vdW) nanomaterials have provided intriguing opportunities for various applications in nanoelectronics. For example, graphene (Gr) is a versatile material owing to its excellent carrier mobility and compatibility with various applications; however, the absence of a bandgap limits its use as a semiconductor channel beyond silicon-based electronics [1,2]. Thus, it can be considered as a conductor material in future electronic devices, and several research groups have used exfoliated Gr as source (S), drain (D), and gate (G) electrodes to achieve all-2D material-based field-effect transistor (FET) applications [3][4][5][6]. The Gr S/D electrodes can effectively overcome the Schottky barrier, generally observed between 2D vdW semiconductors and metal contacts [7][8][9][10], owing to its gatedependent Fermi level (E F ) modulation [4,11]. Because of this advantage, Gr electrodes are widely used in 2D vdW materials-based advanced electronic devices, thereby providing an innovative device structure and excellent device performance.
In this study, a laterally series-connected ambipolar semiconductor/Gr/n-type molybdenum disulfide (MoS 2 ) cascade channel device, called a Gr-bridge heterostructure, was studied beyond heterostructure junction device applications. Each active channel part exhibits distinct transport characteristics, such as ambipolar (PdSe 2 or WSe 2 ), mostly metallic (Gr-bridge), and unipolar (MoS 2 ) properties. However, the series-connected cascade channel combines the transport characteristics of each part, thereby obeying the largest resistance among the channel materials, i.e., the total resistance of the Gr-bridged cascade channel. The Gr-bridge reduces the potential barrier height between the ambipolar semiconductor and n-type MoS 2 junction region owing to its metallic and gapless energy band properties. Using this approach, the Gr-bridge allows the realization of unique switching devices and advanced application methods. We successfully demonstrated a multi-value logic inverter circuit and a frequency tripler for advanced electronic applications. Thus, we believe that the Gr-bridge heterojunction structure will open the gate for future electronics by designing device architectures and blending electrical properties toward high-end applications.

Device Fabrication
The 285 nm SiO 2 /p + -Si substrate was ultrasonically cleaned in acetone, methyl alcohol, and isopropyl alcohol for 15 min each. To construct the Gr-bridge structure, polydimethylsiloxane (PDMS) stamps were used to exfoliate and transfer 2D vdW nanomaterials onto the substrate through the direct imprinting method. Next, a lift-off process was employed to form the top-gate electrode and the extended S/B/D pad electrodes. E-beam lithography and evaporation were, respectively, used for patterning and depositing metal electrodes at the 3D Convergence Center of Inha University.

Electrical Characterization
All transfer, output, and VTC characteristics were measured using a semiconductor parameter analyzer (4156B, Agilent) in a dark probe station at room temperature (300 K). To demonstrate the dynamic performance of the WGM-FET, sinusoidal and ramp waveform signals were generated from a function generator (AFG31022, Tektronix). Figure 1a shows the transfer characteristics of PdSe 2 (narrow bandgap, ~ 0.01 eV) and WSe 2 (wide bandgap, ~ 1.3 eV) channel-based conventional FET devices [15,24]. The hexagonal boron nitride (h-BN) sandwich structure and Gr S/D electrodes were adopted to investigate their fundamental ambipolar transfer characteristics (I D -V G ) (see Fig. S1 for the cross-sectional device schematics and optical microscopy (OM) images of the two ambipolar-FET devices). The WSe 2 -FET exhibits both lower drain ON (I D,p and I D,n ) and OFF I D (I D,off ) current levels; however, the ON/OFF I D ratio (I ON /I OFF ) is higher than that of the PdSe 2 -FET. The narrow-bandgap materials typically have good electron and hole carrier mobilities; therefore, they bring a higher ON I D value in FET devices but poor OFF I D in general. These distinct transfer characteristics are due to their energy bandgap properties, as shown in Fig. 1b. In 2D vdW ambipolar semiconductors, the gate voltage (V G ) can electrostatically control the carrier concentration in the active channel of FET devices, namely the electrostatic doping effect [51]. A positive V G over the threshold voltage of the n-type region (V th,n ) causes E F to reach the conduction-band edge (E c ), whereas a negative V G near the V th of the p-type region (V th,p ) enables E F to reach the valence-band edge (E v ) of ambipolar semiconductor channel materials [24,52,53]. Consequently, a wider bandgap will result in a larger valley-like transfer characteristic curve because it needs a stronger V G (gate field) to modulate the E F from the intrinsic Fermi level (E i ) to E c for the n-type transition (or the E F from E i to E v for p-type transition) with a higher I ON /I OFF ratio. E G values of the ambipolar channel materials can be easily estimated by using the V th difference (ΔV th = V th,n -V th,p ) and the average subthreshold slopes [SS avg = (SS n + SS p )/2] of the n-type and p-type regions by Eq. (1), where q is the electron charge and SS 60 is the ideal SS value of 60 mV dec −1 [24,35,52,53]. Figure 1c shows the schematic of a typical top-gate transistor device and the expected valley-like transfer characteristic model of ambipolar FETs. The narrow bandgap of the active channel implies that even a small change in V G leads to a large number of carriers in the active channel with V th,n and V th,p near the transition point (center of the valley-like transfer curve), thereby resulting in a high I ON , high I OFF , and low I ON /I OFF ratio. Although a narrow-bandgap ambipolar semiconductor typically exhibits high-performance FET behavior, the inevitably high I OFF renders it difficult to use for digital logic circuit applications with better switching characteristics, as compared to wide-bandgap ambipolar semiconductors [35]. Based on the ambipolar properties of PdSe 2 (narrow bandgap) and WSe 2 (wide bandgap) active channel materials, Gr-bridge heterostructure devices have been studied to achieve advanced electronic applications, such as multi-value logic inverters and frequency tripler circuits.

2D Ambipolar Semiconductor and Gr-Bridge Heterostructure Device
(1) E g = qΔV th SS avg /SS 60 Such devices were formed as a platform of sequentially connected Gr-S, ambipolar semiconductors, Gr-bridge layers, MoS 2 , and Gr-D, as shown in Fig. 1d. The Gr bridge layer allows for the inherent characteristics of each 2D vdW semiconductor because it can provide tunable contact properties to both 2D vdW active channels according to its gatedependent Fermi level modulation [4,11]. Essentially, the Gr-bridge FET can be regarded as a series connection of the ambipolar-FET and MoS 2 -FET, with the same electrical characteristics. Figure 1e shows the simple resistance-inseries model of Gr-bridge FET. The total resistance (R tot ) depends on the sum of the resistance in each FET part owing to the series connection properties; therefore, R tot will follow the higher resistance of the two active channels during the device operation. Based on these operating properties, the connected ambipolar and MoS 2 active channel devices in

PdSe 2 -Gr-MoS 2 Heterostructure FET
The first Gr-bridge-based high-end device consists of ambipolar PdSe 2 (narrow bandgap) and n-type MoS 2 active channel materials for multi-value logic applications, as shown in Fig. 2a. Figure 2b, c shows the OM images before and after metal patterning for the extended S/D and common gate (G) electrodes. For sample preparation, the bottom h-BN, Gr S/D, MoS 2 -Gr-PdSe 2 heterostructure, and h-BN gate insulator were sequentially exfoliated and transferred onto a 285 nm-thick silicon dioxide (SiO 2 )/p + -silicon (Si) substrate. Subsequently, Ti/Au (5 /50 nm) electrodes were patterned and deposited using a combination of e-beam lithography and e-beam evaporation systems. The detailed step-by-step fabrication flow and thickness information for each 2D vdW material are depicted in Fig. S2 and S3, respectively. Figure 2d shows the I D -V G transfer curves of the  provide high-quality interfaces, hysteresis-less ideal transfer properties exist in all FET operations [54][55][56][57]. The MoS 2 -FET exhibits strong n-type transfer characteristics, and the PdSe 2 -FET shows ambipolar transfer characteristics using the Gr bridge layer as a source. Because the graphene interlayer has a gate-tunable contact capacity, it can act as a "bridge," thereby reducing the Schottky junction properties between the ambipolar and n-type active channels. The detailed Raman spectrum analysis to confirm the clean and non-interactive interface properties of Gr-bridge and TMDC channels are shown in Fig. S4 To analyze the detailed transport properties of the PGM-FET, the transconductance (g m = dI D /dV G ) was calculated, and a negative g m was observed in region III (humped curve), as shown in Fig. 2e. Figure 2f-h shows the output characteristic (I D -V D ) curves of the MoS 2 -FET, PdSe 2 -FET, and PGM-FET obtained from V G ranging from − 2 to 2 V in steps of 0.5 V. The Gr bridge provides tunable ohmic contact properties; therefore, the output curves of the MoS 2 and PdSe 2 active channels exhibit typical n-type and ambipolar transport properties, respectively. Moreover, the PGM-FET exhibits the composite output characteristics of the MoS 2 -FET (V G range of − 2 to − 1 V) and PdSe 2 -FET (V G range of − 0.5 to 2 V).

PGM-FET-Based Multi-value Logic Circuit Applications
Based on the non-classical humped I D -V G transfer properties, we extended our PGM-FET study to multi-value logic circuit applications as a first-approach method. An external resistor of 10 MΩ was chosen for the resistive-load inverter circuit near the humped I D curve, as shown in Fig. 3a. The inset shows the dynamic V out responses obtained from a sinusoidal waveform of V in , which can identify the dynamic ternary levels of the demonstrated ternary logic circuit. The peak-to-peak voltage (V p-p ) and periodic time (T) were 4 V and 1 s, respectively. We developed inverted ternary logic for the Gr-bridge structure, which simply employs a narrow-bandgap ambipolar semiconductor (PdSe 2 ) and an n-type semiconductor (MoS 2 ). Based on the above understanding of the PGM-FET-based ternary logic circuit, we attempted to investigate a direct PdSe 2 -MoS 2 junction FET (PMJ-FET) for a more advanced and practical device model, as shown in Fig. S5. Although the PMJ-FET also exhibits a non-classical humped I D -V G transfer curve and ternary logic circuit operation, the absence of the Gr-bridge interlayer results in rectifying properties at the PdSe 2 /MoS 2 junction [58]. Consequently, the PMJ-FET exhibits asymmetric (having direction) device characteristics and a limitation in dynamic operation, whereas the PGM-FET exhibits symmetric (bidirectional) logic circuit operation properties. Furthermore, reliability problems remain in the PMJ-FET because controlling the optimized junction properties between the two different semiconductor active channels is difficult. As shown in Fig. S4d, the PMJ-FET does not trace the transfer curves of the MoS 2 -FET and PdSe 2 -FET because of the rectifying junction properties of MoS 2 /PdSe 2 [42]. Therefore, adopting the Gr-bridge device structure will provide reliability and convenience for further study of high-end multi-value logic applications.

WSe 2 -Gr-MoS 2 Heterostructure FET Device
As a second approach toward advanced electronic applications, WSe 2 , a wide-bandgap ambipolar active channel, was chosen to realize the Gr-bridge heterostructure device instead of the PdSe 2 -based ternary logic circuit. Figure 4a shows the 3D device schematic of WSe 2 -Gr-MoS 2 FET, named "WGM-FET." Figure 4b, c shows the OM images before and after patterning of the extended S/D and G electrodes, respectively, through the same device fabrication processes of PGM-FET. The detailed process flow and thickness information for each layer are shown in Figs. S6 and S7, respectively. Figure Figure 4e shows the g m -V G curve of the WGM-FET; a negative g m was observed in operation region III owing to the p-type transition properties of the WSe 2 active channel.

WGM-FET-Based Frequency Tripler Circuit Applications
These non-classical transfer characteristics of the WGM-FET bring unique VTC characteristics of an upside-down letter "N"-like curve in inverter logic circuit applications, as shown in Fig. 5a. To achieve a resistive-load inverter circuit, an external resistor of 100 MΩ was connected to the WGM-FET. Figure 5b shows the VTC curve, and the four transition states were observed as sequentially "High", "Low", "High", and "Low" output states according to the voltage sweep of V in at V DD of 2 V. The inset shows the four distinguished logic states at V in of − 1, − 0.5, 1, and 2 V. Figure 5c shows the voltage gain of our demonstrated inverter circuit, which has both negative and positive values. The V in sweep from "Low (− 1 V)" to "High (2 V)" should produce sequential output states of "High-Low-High-Low" and the backward V in sweep from "High" to "Low" generated the reversed output states of "Low-High-Low-High." That is, a double sweep of V in of "Low-High-Low," similar to a single waveform, will produce the "High-Low-High-Low-High-Low-High" sequential output states. The repeatable "High" and "Low" output logic states enable an advanced frequency response application with respect to the sinusoidal waveform of V in , as shown in Fig. 5d. As a result, a single cycle of sinusoidal waveform V in should produce three cycles of the waveform V out . This circuit application method can be regarded as a "frequency tripler," which can generate the output frequency (f out ) to triple the value from the input frequency (f in ). Finally, for the first time, we successfully demonstrated a frequency tripler application with a single Gr-bridge heterostructure FET consisting of a wide-bandgap ambipolar semiconductor. Figure 5e shows the real-time V out responses for the 0.1, 0.5, and 1 Hz sinusoidal waveforms of V in (see Fig. S8 for the realtime V out response for the 1 Hz ramp waveform V in ). The V out responses were analyzed using fast Fourier transform (FFT), as shown in Fig. S9. Our frequency response application should be economical to generate triple frequency toward low-power (frequency) and low-cost, more effective than the conventional frequency multiplier circuit for future advanced electronics.

Conclusions
In this study, Gr-bridge FETs consisting of laterally series-connected ambipolar semiconductor/Gr-bridge/ntype MoS 2 cascade channels were studied for high-end switching device applications based on their non-classical negative differential transconductance characteristics. The Gr-bridge layer could eliminate the Schottky junction properties between two semiconductor channels; therefore, the Gr-bridge FETs showed synthetic transfer characteristics, perfectly tracing the lower I D of each channel material based on the simple resistance-in-series model, unlike the heterojunction devices without the Gr-bridge layer. Moreover, we successfully implemented two types of advanced electronic applications based on the bandgap properties of PdSe 2 (narrow-bandgap) and WSe 2 (wide-bandgap) ambipolar semiconductors for a multi-value logic inverter (PGM-FET) and frequency tripler (WGM-FET) circuits, respectively. Thus, we believe that the results of our Gr-bridge heterostructure devices and multi-functional circuit applications will provide reliability and convenience to open up a breakthrough toward future advanced electronics.